The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 21, 2021
Filed:
Nov. 26, 2019
Imec Vzw, Leuven, BE;
Frederic Lazzarino, Hamme-Mille, BE;
Guillaume Bouche, Brussels, BE;
Juergen Boemmels, Heverlee, BE;
IMEC VZW, Leuven, BE;
Abstract
A method for forming an interconnection structure for a semiconductor device is provided. The method includes: (i) forming a conductive layer on an insulating layer; (ii) forming above the conductive layer a first set of mandrel lines of a first material; (iii) forming a set of spacer lines of a second material different from the first material, wherein the spacer lines of the second material are formed on sidewalls of the first set of mandrel lines; (iv) forming a second set of mandrel lines of a third material different from the first and second materials, wherein the second set of mandrel lines fill gaps between spacer lines of the set of spacer lines; (v) cutting at least a first mandrel line of the second set of mandrel lines into two line segments separated by a gap by etching said first mandrel line of the second set of mandrel lines selectively to the set of spacer lines and the first set of mandrel lines, cutting at least a first mandrel line of the first set of mandrel lines into two line segments separated by a gap by etching said first mandrel line of the first set of mandrel lines selectively to the set of spacer lines and the second set of mandrel lines; (vi) removing the set of spacer lines, selectively to the first and second sets of mandrel lines, thereby forming an alternating pattern of mandrel lines of the first set of mandrel lines and mandrel lines of the second set of mandrel lines; and (vii) patterning the conductive layer to form a set of conductive lines, wherein the patterning comprises etching while using the alternating pattern of mandrel lines of the first and second sets of mandrel lines as an etch mask.