Methods and systems for streaming data packets on peripheral component interconnect (pci) and on-chip bus interconnects

Abstract

A method and architecture to write data between a source and destination by memory mapped writes or streaming packets between any of a host, a peripheral or a sub-peripheral device. A stream address is used to write the data to a memory of the destination without the source being aware of physical addresses of destination memory, i.e., memory descriptors or pointers are not used, allowing the destination to manage its own memory. The stream address may enable streaming data packets over interconnects that may not allow packet streaming by dividing a data packet into data chunks and including a stream address for each chunk. The stream address for a given packet includes a repeated first portion indicating the destination and a varied second portion indicating variable information for each data chunk such as start of packet (SoP) and end of packet (EoP) identifiers.