The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 07, 2021

Filed:

Oct. 23, 2018
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventor:

John F. Kaeding, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 25/18 (2006.01); H01L 25/16 (2006.01); H01L 23/31 (2006.01); H01L 25/065 (2006.01); H01L 27/146 (2006.01); G02B 6/12 (2006.01); G02B 6/42 (2006.01); H01L 23/498 (2006.01); H01L 23/48 (2006.01); G02B 6/43 (2006.01); G02F 1/025 (2006.01); H01L 27/12 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5384 (2013.01); G02B 6/12 (2013.01); G02B 6/4202 (2013.01); H01L 23/3128 (2013.01); H01L 24/09 (2013.01); H01L 24/17 (2013.01); H01L 24/32 (2013.01); H01L 25/167 (2013.01); H01L 25/18 (2013.01); H01L 2224/0401 (2013.01); H01L 2225/06555 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/12043 (2013.01);
Abstract

Semiconductor devices having optical routing layers, and associated systems and methods, are disclosed herein. In one embodiment, a method of manufacturing a semiconductor device includes forming conductive pads on a first side of a substrate and electrically coupled to conductive material of vias extending partially through the substrate. The method further includes removing material from a second side of the substrate so that the conductive material of the vias projects beyond the second side of the substrate to define projecting portions of the conductive material. The method also includes forming an optical routing layer on the second side of the substrate and at least partially around the projecting portions of the conductive material.


Find Patent Forward Citations

Loading…