The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 31, 2021

Filed:

Jan. 27, 2020
Applicant:

Fuji Electric Co., Ltd., Kanagawa, JP;

Inventors:

Yuichi Harada, Matsumoto, JP;

Misaki Takahashi, Matsumoto, JP;

Kouta Yokoyama, Matsumoto, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/739 (2006.01); H01L 27/06 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 29/861 (2006.01); H01L 21/265 (2006.01); H01L 21/266 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7397 (2013.01); H01L 27/0635 (2013.01); H01L 29/0619 (2013.01); H01L 29/0657 (2013.01); H01L 29/0696 (2013.01); H01L 29/0821 (2013.01); H01L 29/1004 (2013.01); H01L 29/1095 (2013.01); H01L 29/417 (2013.01); H01L 29/4236 (2013.01); H01L 29/4238 (2013.01); H01L 29/42376 (2013.01); H01L 29/861 (2013.01); H01L 21/266 (2013.01); H01L 21/26513 (2013.01); H01L 29/1079 (2013.01);
Abstract

Provided is a semiconductor device that includes: a first conductivity type anode region provided in the semiconductor substrate in the diode region; a second conductivity type drift region that is located below the anode region in the semiconductor substrate; a second conductivity type accumulation region that is located between the anode region and the drift region in a depth direction of the semiconductor substrate; and an insulating film that includes a plurality of contact portions extending in a first direction and is provided on an upper surface of the semiconductor substrate; wherein the plurality of contact portions include a first contact portion provided in the diode region; and the first contact portion includes a first non-overlapping region in which an end of the first contact portion and the accumulation region in the first direction do not overlap in the depth direction.


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