The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 31, 2021

Filed:

Mar. 01, 2019
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Indu Kumari, San Jose, CA (US);

Narendhiran CR, San Jose, CA (US);

Abhinand Amarnath, San Jose, CA (US);

Balakumar Rajendran, San Jose, CA (US);

Muralitharan Jayaraman, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/07 (2006.01); G11C 29/42 (2006.01); G06F 11/10 (2006.01);
U.S. Cl.
CPC ...
G06F 11/076 (2013.01); G06F 11/1048 (2013.01); G11C 29/42 (2013.01);
Abstract

A method for error correction in a memory system includes determining a bit error ratio for a memory block of the memory system during a read operation. The method further includes determining whether the bit error ratio is between a first threshold and a second threshold. The method further includes based on a determination that the bit error ratio is between the first threshold and the second threshold, performing a select gate drain (SGD) read operation on a SGD word line of the memory block. The method further includes generating first soft bit data using SGD data corresponding to the SGD read operation. The method further includes performing a low-density parity-check correction using the first soft bit data on the memory block.


Find Patent Forward Citations

Loading…