The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 24, 2021

Filed:

Dec. 27, 2019
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Anilkumar Chandolu, Boise, ID (US);

S.M. Istiaque Hossain, Boise, ID (US);

Darwin A. Clampitt, Wilder, ID (US);

Arun Kumar Dhayalan, Boise, ID (US);

Kevin R. Gast, Boise, ID (US);

Christopher Larsen, Boise, ID (US);

Prakash Rau Mokhna Rau, Boise, ID (US);

Shashank Saraf, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/115 (2017.01); H01L 27/11556 (2017.01); H01L 27/11582 (2017.01); H01L 27/11519 (2017.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01); H01L 27/11565 (2017.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11556 (2013.01); H01L 21/76802 (2013.01); H01L 23/5226 (2013.01); H01L 23/53295 (2013.01); H01L 27/11519 (2013.01); H01L 27/11565 (2013.01); H01L 27/11582 (2013.01); H01L 21/31116 (2013.01);
Abstract

A method used in forming a memory array comprising strings of memory cells comprises forming a stack comprising vertically-alternating first tiers and second tiers comprising memory-block regions having channel-material strings therein. Conductor-material contacts are directly against the channel material of individual of the channel-material strings. First insulator material is formed directly above the conductor-material contacts. The first insulator material comprises at least one of (a) and (b), where (a): silicon, nitrogen, and one or more of carbon, oxygen, boron, and phosphorus, and (b): silicon carbide. Second insulator material is formed directly above the first insulator material and the conductor-material contacts. The second insulator material is devoid of each of the (a) and (b). Third insulator material is formed directly above the second insulator material, the first insulator material, and the conductor-material contacts. The third insulator material comprises at least one of the (a) and (b). At least one horizontally-elongated isolation structure is formed in the first and second insulator materials and in a top part of the stack in individual of the memory-block regions. Additional methods, including structure independent of method, are disclosed.


Find Patent Forward Citations

Loading…