The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 17, 2021

Filed:

Mar. 26, 2016
Applicant:

Rongfu Xiao, Dublin, CA (US);

Inventor:

Rongfu Xiao, Dublin, CA (US);

Assignee:

T3Memory USA, Inc., Fremont, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 43/12 (2006.01); H01L 43/02 (2006.01); H01L 43/08 (2006.01); H01L 43/10 (2006.01);
U.S. Cl.
CPC ...
H01L 43/12 (2013.01); H01L 43/02 (2013.01); H01L 43/08 (2013.01); H01L 43/10 (2013.01);
Abstract

This invention is about a method to make an MRAM element with small dimension, by making an MTJ as close as possible to the via, ideally aligning the MTJ and the via in a direction perpendicular to the wafer surface, for making the MRAM element dimension as small as possible. The invention provides a process scheme to flatten the interface of bottom electrode during film deposition, which ensures a good deposition of atomically smooth MTJ multilayer as close as possible to an associated via which otherwise might be atomically rough. The flattening scheme is first to deposit a thin amorphous conducting layer in the middle of BE deposition and immediately to bombard the amorphous layer by low energy ions to provide kinetic energy for surface atom diffusion to move from high point to low kinks. With such surface flattening scheme, not only the MRAM element can be made extremely small, but its device performance and magnetic stability can also be greatly improved.


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