The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 17, 2021
Filed:
Sep. 17, 2019
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Xusheng Wu, Hsinchu, TW;
Youbo Lin, Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
Abstract
The present disclosure provides a method that includes forming a gate stack on a semiconductor substrate; forming an etch stop layer on the gate stack and the semiconductor substrate; depositing a dielectric liner layer on the etch stop layer; performing an anisotropic etch to selectively remove portions of the dielectric liner layer such that the etch stop layer is exposed on top surfaces of the gate stack and the semiconductor substrate; depositing a silicon layer selectively on exposed surfaces of the etch stop layer; depositing an inter-layer dielectric (ILD) layer on the gate stack and the semiconductor substrate; and performing an anneal to oxidize the silicon layer, thereby generating a compressive stress to a channel region underlying the gate stack.