The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 17, 2021

Filed:

Nov. 27, 2019
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Kishore Kumar Muchherla, Fremont, CA (US);

Peter Feeley, Boise, ID (US);

Ashutosh Malshe, Fremont, CA (US);

Daniel J. Hubbard, Boise, ID (US);

Christopher S. Hale, Boise, ID (US);

Kevin R. Brandt, Boise, ID (US);

Sampath K. Ratnam, Boise, ID (US);

Yun Li, Fremont, CA (US);

Marc S. Hamilton, Eagle, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/02 (2006.01); G06F 12/0891 (2016.01); G06F 3/06 (2006.01); G06F 12/06 (2006.01); G11C 11/56 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0253 (2013.01); G06F 3/064 (2013.01); G06F 3/0629 (2013.01); G06F 3/0634 (2013.01); G06F 3/0688 (2013.01); G06F 3/0689 (2013.01); G06F 12/00 (2013.01); G06F 12/0646 (2013.01); G06F 12/0891 (2013.01); G06F 2212/1044 (2013.01); G06F 2212/2022 (2013.01); G06F 2212/7205 (2013.01); G11C 11/5621 (2013.01); G11C 2211/5641 (2013.01);
Abstract

A memory system includes a memory array having a plurality of memory cells; and a controller coupled to the memory array, the controller configured to: select a garbage collection (GC) source block storing valid data, and designate a storage mode for an available memory block based on the valid data, wherein the storage mode is for configuring memory cells in the available memory block as cache memory that stores a number of bits less than maximum storage capacities thereof for subsequent or upcoming data writes.


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