The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 2021

Filed:

Feb. 27, 2018
Applicant:

Inktec Co., Ltd., Ansan-si, KR;

Inventors:

Su Han Kim, Ansan-si, KR;

Kwang-Choon Chung, Yongin-si, KR;

Jung Yoon Moon, Ansan-si, KR;

Sung In Ha, Hwaseong-si, KR;

Byung Woong Moon, Siheung-si, KR;

Assignee:

InkTec Co., Ltd., Ansan-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 3/06 (2006.01); C09K 13/00 (2006.01); H05K 3/24 (2006.01); H05K 3/12 (2006.01); H05K 3/18 (2006.01); H05K 3/38 (2006.01); H05K 3/10 (2006.01);
U.S. Cl.
CPC ...
H05K 3/067 (2013.01); C09K 13/00 (2013.01); H05K 3/06 (2013.01); H05K 3/108 (2013.01); H05K 3/1275 (2013.01); H05K 3/182 (2013.01); H05K 3/243 (2013.01); H05K 3/387 (2013.01); H05K 3/245 (2013.01); H05K 2201/2054 (2013.01); H05K 2203/0723 (2013.01); H05K 2203/0789 (2013.01); H05K 2203/0793 (2013.01); H05K 2203/0796 (2013.01);
Abstract

The disclosure relates to a microcircuit forming method. The microcircuit forming method according to the disclosure comprises: a seed-layer forming step for forming a high-reflectivity seed layer on a substrate material by using a conductive material; a pattern-layer forming step for forming a pattern layer on the seed layer, the pattern layer having a pattern hole arranged thereon to allow the seed layer to be selectively exposed therethrough; a plating step for filling the pattern hole with a conductive material; a pattern-layer removing step for removing the pattern layer; and a seed-layer patterning step for removing a part of the seed layer which does not overlap the conductive material in the plating step, wherein the high-reflectivity seed layer has a specular reflection property.


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