The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 2021

Filed:

Oct. 04, 2019
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chin-Shan Wang, Hsinchu, TW;

Shun-Yi Lee, Zhudong Township, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01); H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10832 (2013.01); H01L 27/1085 (2013.01); H01L 27/1087 (2013.01); H01L 27/10826 (2013.01); H01L 27/10879 (2013.01); H01L 27/10891 (2013.01); H01L 21/823878 (2013.01);
Abstract

A semiconductor device includes a substrate. The semiconductor device further includes a first transistor on the substrate, wherein the first transistor includes a first source/drain electrode in the substrate. The semiconductor device further includes a second transistor on the substrate, wherein the second transistor includes a second source/drain electrode. The semiconductor device further includes an insulating layer extending into the substrate, wherein the insulating layer directly contacts the first source/drain electrode and the second source/drain electrode, a top surface of the insulating layer is above a top surface of the substrate, and a sidewall of the insulating layer above the substrate is aligned with a sidewall of the insulating layer within the substrate.


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