The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 2021

Filed:

Nov. 25, 2019
Applicant:

Sandisk Technologies Llc, Addison, TX (US);

Inventors:

Chen Wu, Leuven, BE;

Peter Rabkin, Cupertino, CA (US);

Masaaki Higashitani, Cupertino, CA (US);

Assignee:

SANDISK TECHNOLOGIES LLC, Addison, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2006.01); H01L 21/768 (2006.01); H01L 21/822 (2006.01); H01L 27/06 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 21/76898 (2013.01); H01L 21/8221 (2013.01); H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 25/50 (2013.01); H01L 27/0688 (2013.01);
Abstract

A first semiconductor die includes first bonding pads. The first bonding pads include proximal bonding pads embedded within a first bonding dielectric layer and distal bonding pads having at least part of the sidewall that overlies the first bonding dielectric layer. A second semiconductor die includes second bonding pads. The second bonding pads are bonded to the proximal bonding pads and the distal bonding pads. The proximal bonding pads are bonded to a respective one of a first subset of the second bonding pads at a respective horizontal bonding interface and the distal bonding pads are bonded to a respective one of a second subset of the second bonding pads at a respective vertical bonding interface at the same time. Dielectric isolation structures may vertically extend through the second bonding dielectric layer of the second semiconductor die and contact the first bonding dielectric layer.


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