The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 10, 2021

Filed:

Sep. 27, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Nir Tell, Atlit, IL;

Shahar Sandor, Atlit, IL;

Amotz Yagev, Sdot Yam, IL;

Michael Hermony, Santa Clara, CA (US);

Sagie Yakov Goldenberg, Gaaton, IL;

Lihu Rappoport, Haifa, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 9/54 (2006.01);
U.S. Cl.
CPC ...
G06F 9/30196 (2013.01); G06F 9/30036 (2013.01); G06F 9/30043 (2013.01); G06F 9/30145 (2013.01); G06F 9/3842 (2013.01); G06F 9/544 (2013.01);
Abstract

A system is provided that includes an instruction buffer that stores bytes representative of one or more macroinstructions and instruction length decoder circuitry. The instruction length decoder circuitry includes a non-sequential first multiplexer circuitry having first input lines receiving a first input data representative of a speculative length of a first macroinstruction of the macroinstructions, and first selector that selects from the first input lines via a one-hot selector vector. The instruction length decoder circuitry also includes a first output line communicatively coupled to second selector, wherein the first output line causes the selector to select from a second input data representative of a first location of a first ending byte for the first macroinstruction with respect to a value x. The first multiplexer circuitry and the second selector may output start and end byte locations for the macroinstructions.


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