Three-dimensional memory devices

Abstract

Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate and a memory stack including interleaved conductive layers and dielectric layers above the substrate. The 3D memory device also includes a slit structure extending vertically through the memory stack and extending laterally along a serpentine path to separate the memory stack into a first area and a second area. The 3D memory device further includes first channel structures each extending vertically through the first area of the memory stack and including a drain at its upper end, and second channel structures each extending vertically through the second area of the memory stack and including a source at its upper end. The 3D memory device further includes semiconductor connections disposed vertically between the substrate and the memory stack. Each semiconductor connection crosses the slit structure in a plan view to electrically connect a respective pair of first and second channel structures.