The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 03, 2021
Filed:
Jun. 18, 2019
Applicant:
Sandisk Technologies Llc, Addison, TX (US);
Inventors:
Hardwell Chibvongodze, Hiratsuka, JP;
Masatoshi Nishikawa, Nagoya, JP;
Assignee:
SanDisk Technologies LLC, Addison, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/08 (2006.01); G11C 16/14 (2006.01); H01L 23/528 (2006.01); H01L 27/11582 (2017.01); G11C 16/04 (2006.01); G11C 16/26 (2006.01); H01L 25/18 (2006.01);
U.S. Cl.
CPC ...
G11C 16/14 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/26 (2013.01); H01L 23/528 (2013.01); H01L 25/18 (2013.01); H01L 27/11582 (2013.01); G11C 2216/18 (2013.01);
Abstract
A memory device is disclosed configured to share word line switches (WLSW) between each word line of two adjacent erase blocks. The word lines are driven from both sides of the memory array to reduces resistive-capacitive (RC) loading during pre-charge/ramp-up periods and during discharge/ramp-down periods for various storage operations. The dual-sided driving of signals combines with synergistic erase block size management to lower read latency (tR) for non-volatile memory media.