The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 03, 2021

Filed:

Apr. 17, 2019
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventor:

Stephen Tang, Fremont, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01); H01L 45/00 (2006.01); H01L 27/10 (2006.01); H01L 27/24 (2006.01); H01L 23/48 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0004 (2013.01); G11C 13/0002 (2013.01); G11C 13/003 (2013.01); H01L 23/481 (2013.01); H01L 23/528 (2013.01); H01L 27/101 (2013.01); H01L 27/2463 (2013.01); H01L 45/06 (2013.01); H01L 45/124 (2013.01); H01L 45/1253 (2013.01); H01L 45/1683 (2013.01); H01L 27/249 (2013.01); H01L 27/2481 (2013.01); H01L 45/1233 (2013.01); H01L 45/1675 (2013.01); H01L 2924/0002 (2013.01);
Abstract

Embodiments disclosed herein may relate to electrically conductive vias in cross-point memory array devices. In an embodiment, the vias may be formed using a lithographic operation also utilized to form electrically conductive lines in a first electrode layer of the cross-point memory array device.


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