The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 27, 2021

Filed:

Apr. 20, 2020
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Wei Yu Ma, Taitung, TW;

Fang-Tsun Chu, Taichung, TW;

Kvei-Feng Yen, Hsinchu, TW;

Yao-Bin Wang, Yangmei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 27/06 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); H01L 21/7684 (2013.01); H01L 21/76816 (2013.01); H01L 21/76879 (2013.01); H01L 23/528 (2013.01); H01L 27/0629 (2013.01); H01L 29/0619 (2013.01); H01L 23/522 (2013.01); H01L 29/06 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A method includes forming a transistor at a surface of a semiconductor substrate, wherein the step of forming the transistor comprises forming a gate electrode, and forming a source/drain region adjacent the gate electrode. First metal features are formed to include at least portions at a same level as the gate electrode. Second metal features are formed simultaneously, and are over and contacting the first metal features. A first one of the second metal features is removed and replaced with a third metal feature, wherein a second one of the second metal features is not removed. A fourth metal feature is formed directly over and contacting the gate electrode, wherein the third and the fourth metal features are formed using a same metal-filling process.


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