Non-volatile register and implementation of non-volatile register

Abstract

A non-volatile register is provided. The non-volatile register includes a plurality of cell strings with respect to a plurality of bit lines, wherein each cell string includes a plurality of cells. Each word line is respectively connecting to a gate of one cell for each cell string to correspondingly form a page. The pages are configured into: a central page used as a register to store registered data; and a plurality of dummy pages at both sides of the central page. The dummy pages are controlled to provide a boosted channel voltage to a portion of memory cells of the central page, not being programmed. A source selection transistor is connected to a first side for each cell string. A drain selection transistor is connected to a second side for each cell string.