The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 13, 2021

Filed:

Jul. 13, 2017
Applicants:

Semiconductor Manufacturing International (Beijing) Corporation, Beijing, CN;

Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;

Inventors:

Gang Qian, Shanghai, CN;

Yiming Miao, Shanghai, CN;

Yanlin Sun, Shanghai, CN;

Xubo Chen, Shanghai, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/165 (2006.01); H01L 29/66 (2006.01); H01L 21/8234 (2006.01); H01L 29/78 (2006.01); G11C 11/417 (2006.01); H01L 21/265 (2006.01); H01L 21/762 (2006.01); H01L 21/768 (2006.01); H01L 23/535 (2006.01); H01L 27/11 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66545 (2013.01); G11C 11/417 (2013.01); H01L 21/265 (2013.01); H01L 21/76224 (2013.01); H01L 21/76895 (2013.01); H01L 21/823475 (2013.01); H01L 23/535 (2013.01); H01L 27/1104 (2013.01); H01L 27/1112 (2013.01); H01L 29/0649 (2013.01); H01L 29/78 (2013.01);
Abstract

A semiconductor device includes a semiconductor substrate, a trench isolator portion in the semiconductor substrate, a dummy gate on the semiconductor substrate, a first doped region between the trench isolator portion and the dummy gate in the semiconductor substrate, and a first connecting member electrically connected the dummy gate with the first doped region. With the dummy gate electrically connected to the first doped region, a transistor including the dummy gate is turned off, thereby preventing the occurrence of current leakage and improving the reliability of a memory device having the semiconductor device.


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Qian, Gang. (2021). Semiconductor device layout structure and manufacturing method thereof (U.S. Patent No. 11063132). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11063132

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