The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 13, 2021
Filed:
Jun. 30, 2020
Intel Corporation, Santa Clara, CA (US);
Andrew T. Lauritzen, Victoria, CA;
Altug Koker, El Dorado Hills, CA (US);
Louis Feng, San Jose, CA (US);
Tomasz Janczak, Gdansk, PL;
David M. Cimini, Orangevale, CA (US);
Karthik Vaidyanathan, Berkeley, CA (US);
Abhishek Venkatesh, Hillsboro, OR (US);
Murali Ramadoss, Folsom, CA (US);
Michael Apodaca, Folsom, CA (US);
Prasoonkumar Surti, Folsom, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
An embodiment of a graphics pipeline apparatus may include a vertex shader, a visibility shader communicatively coupled to an output of the vertex shader to construct a hierarchical visibility structure, a tile renderer communicatively coupled to an output of the vertex shader and to the visibility shader to perform a tile-based immediate mode render on the output of the vertex shader based on the hierarchical visibility structure, and a rasterizer communicatively coupled to an output of the tile renderer to rasterize the output of the tile renderer based on the hierarchical visibility structure. Other embodiments are disclosed and claimed.