The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 06, 2021

Filed:

Jun. 28, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Ankur N. Shah, Folsom, CA (US);

Nishanth Reddy Pendluru, Folsom, CA (US);

Joseph Koston, Folsom, CA (US);

Murali Ramadoss, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/00 (2006.01); G06T 1/20 (2006.01); G06T 15/00 (2011.01); G06F 9/455 (2018.01); G06F 9/38 (2018.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06T 1/20 (2013.01); G06F 9/3836 (2013.01); G06F 9/45558 (2013.01); G06F 9/5061 (2013.01); G06T 15/005 (2013.01); G06F 2009/45583 (2013.01); G06F 2009/45595 (2013.01);
Abstract

An apparatus and method for provisioning virtualized tile-based graphics processing circuitry. For example, one embodiment of an apparatus comprises: processing resources to process commands including graphics commands and generate results; resource partitioning circuitry to partition the processing resources into a plurality of tiles in accordance with a specified tile-based resource allocation policy; and graphics virtualization circuitry to perform tile-based allocation of the processing resources to a plurality of virtual machines in accordance with a specified virtualization policy, the virtual machines to be executed in a virtualized execution environment.


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