The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 06, 2021
Filed:
Jul. 08, 2019
Sambanova Systems, Inc., Palo Alto, CA (US);
Raghu Prabhakar, San Jose, CA (US);
Manish K. Shah, Austin, TX (US);
Pramod Nataraja, San Jose, CA (US);
David Brian Jackson, Dana Point, CA (US);
Kin Hing Leung, Cupertino, CA (US);
Ram Sivaramakrishnan, San Jose, CA (US);
Sumti Jairath, Santa Clara, CA (US);
Gregory Frederick Grohoski, Bee Cave, TX (US);
SAMBANOVA SYSTEMS, INC., Palo Alto, CA (US);
Abstract
A reconfigurable data processor comprises an array of configurable units configurable to allocate a plurality of sets of configurable units in the array to implement respective execution fragments of the data processing operation. Quiesce logic is coupled to configurable units in the array, configurable to respond to a quiesce control signal to quiesce the sets of configurable units in the array on quiesce boundaries of the respective execution fragments, and to forward quiesce ready signals for the respective execution fragments when the corresponding sets of processing units are ready. An array quiesce controller distributes the quiesce control signal to configurable units in the array, and receives quiesce ready signals for the respective execution fragments from the quiesce logic.