The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 29, 2021

Filed:

Jan. 16, 2020
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Greg Gruber, Hsinchu, TW;

Chi-Lin Liu, New Taipei, TW;

Ming-Chang Kuo, Hsinchu County, TW;

Lee-Chung Lu, Taipei, TW;

Shang-Chih Hsieh, Taoyuan County, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/00 (2006.01); G01R 31/3185 (2006.01);
U.S. Cl.
CPC ...
H03K 19/0013 (2013.01); G01R 31/318536 (2013.01);
Abstract

An integrated circuit includes: a flip-flop circuit arranged to receive an input data for generating a master signal during a writing mode according to a first clock signal and a second clock signal, and to output an output data according to the first clock signal and the second clock signal during a storing mode; and a gating circuit coupled to the flip-flop circuit, for generating the first clock signal and the second clock signal according to the master signal and an input clock signal; wherein a first signal transition number of the first clock signal and a second signal transition number of the second clock signal are not greater than a third signal transition number of the input clock signal during the writing mode and the storing mode.


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