The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 29, 2021

Filed:

Aug. 05, 2020
Applicant:

Suzhou Han Hua Semiconductor Co., Ltd, Jiangsu, CN;

Inventors:

Xianfeng Ni, Jiangsu, CN;

Qian Fan, Jiangsu, CN;

Wei He, Jiangsu, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/20 (2006.01); H01L 27/085 (2006.01); H01L 29/778 (2006.01); H01L 29/205 (2006.01); H01L 27/06 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66462 (2013.01); H01L 27/0605 (2013.01); H01L 27/085 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/7781 (2013.01); H01L 29/7786 (2013.01);
Abstract

An integrated enhancement/depletion mode high electron mobility transistor (HEMT) includes a substrate, a first buffer layer, a first barrier layer, a first channel layer, a first source, a first drain, a first gate, a second buffer layer, a second barrier layer, a second channel layer, a second source, a second drain, and a second gate. The first buffer layer is on the substrate. The first barrier layer is on a first area of the first buffer layer, the first channel layer is on the first barrier layer, and the first source, the first drain, and the first gate are on the first channel layer. The second buffer layer is on a second area of the first buffer layer, the second bather layer is on the second buffer layer, the second channel layer is on the second barrier layer, and the second source, the second drain, and the second gate are on the second channel layer.


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