The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 29, 2021
Filed:
Aug. 28, 2019
Sien (Qingdao) Integrated Circuits Co., Ltd, Shangdong, CN;
Deyuan Xiao, Shanghai, CN;
SiEn (QingDao) Integrated Circuits Co., Ltd., Qingdao, CN;
Abstract
The present invention provides a gate-all-around quantum gradient-doped nano-sheet complementary inverter may comprise a P-type field effect transistor (FET) and an N-type FET. The P-type FET may comprise a P-type semiconductor nano-sheet channel, a first gate dielectric layer fully surrounding the P-type semiconductor nano-sheet channel, a first gate layer, and a source and a gate area, arranged at two ends of the channel. The N-type FET may comprise an N-type semiconductor nano-sheet channel, a second gate dielectric layer fully surrounding the N-type semiconductor nano-sheet channel, a second gate layer, and a source and a gate area, arranged at two ends of the channel. A common gate electrode may be arranged to fully surround the first and second gate layers. The doping concentration of the P-type and N-type semiconductor nano-sheet channels, which are arranged laterally, side by side, may be in gradient descent from the surface to the center. The width of the P-type semiconductor nano-sheet channel may be greater than that of the N-type semiconductor nano-sheet channel. The structure of the disclosed device may be dense enough to increase the density and improve the performance and simple enough to produce.