The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 29, 2021

Filed:

Mar. 19, 2020
Applicant:

Vanguard International Semiconductor Corporation, Hsinchu, TW;

Inventors:

Yung-Fong Lin, Taoyuan, TW;

Shin-Cheng Lin, Tainan, TW;

Cheng-Wei Chou, Taoyuan, TW;

Yu-Chieh Chou, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 21/768 (2006.01); H01L 29/66 (2006.01); H01L 21/8232 (2006.01); H01L 29/778 (2006.01); H01L 29/06 (2006.01); H01L 27/085 (2006.01);
U.S. Cl.
CPC ...
H01L 23/481 (2013.01); H01L 21/76843 (2013.01); H01L 21/76885 (2013.01); H01L 21/76898 (2013.01); H01L 21/8232 (2013.01); H01L 27/085 (2013.01); H01L 29/0649 (2013.01); H01L 29/66462 (2013.01); H01L 29/778 (2013.01);
Abstract

A semiconductor structure and a method for forming the same are provided. A semiconductor structure includes a substrate, a seed layer on the substrate, an epitaxial layer on the seed layer, a first transistor on the epitaxial layer, an interlayer dielectric layer on the epitaxial layer, a dielectric pillar penetrating through the interlayer dielectric layer and the epitaxial layer, and a conductive liner disposed on a sidewall of the dielectric pillar. The conductive liner is electrically connected to the first transistor and the seed layer.


Find Patent Forward Citations

Loading…