The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 08, 2021

Filed:

Mar. 29, 2017
Applicants:

Intel Corporation, Santa Clara, CA (US);

MD Altai Hossain, Portland, OR (US);

Kevin J Doran, North Plains, OR (US);

Yu Amos Zhang, Raleigh, NC (US);

Zhiguo Qian, Chandler, AZ (US);

Inventors:

Md Altai Hossain, Portland, OR (US);

Kevin J Doran, North Plains, OR (US);

Yu Amos Zhang, Raleigh, NC (US);

Zhiguo Qian, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 25/18 (2006.01); H01L 23/498 (2006.01); H01L 23/13 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5381 (2013.01); H01L 23/13 (2013.01); H01L 23/49805 (2013.01); H01L 23/5383 (2013.01); H01L 23/5386 (2013.01); H01L 25/0652 (2013.01); H01L 25/18 (2013.01); H01L 2224/16225 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06572 (2013.01);
Abstract

A device and method of utilizing an interconnect bridge to electrically couple two semiconductor dies located on different surfaces. Integrated circuit packages using an interconnect bridge to electrically couple a semiconductor die on a substrate to a semiconductor die on a motherboard are shown. Integrated circuit packages using an interconnect bridge to electrically couple a semiconductor die on a top surface of a substrate to a semiconductor die on a bottom surface of a substrate are shown. Methods of electrically coupling semiconductor dies on different surfaces using interconnect bridges are shown.


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