The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 08, 2021

Filed:

Jun. 17, 2020
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventors:

Yi-Xiao Ding, Austin, TX (US);

Mehmet Can Yildiz, Austin, TX (US);

Zhuo Li, Austin, TX (US);

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/3947 (2020.01); G06F 30/392 (2020.01);
U.S. Cl.
CPC ...
G06F 30/3947 (2020.01); G06F 30/392 (2020.01);
Abstract

Various embodiments described herein provide for track assignment of wires of a network of a circuit design by dynamic programming. In particular, various embodiments use a dynamic programming process to determine a set of breaking points for a routing wire of a global-routed and layer-assigned circuit design, and to determine track assignments for each of the sub-wires (sub-routes) formed by applying the set of selected breaking points to the routing wire. This results in a set of track-assigned sub-wires (or track-assigned sub-routes), which various embodiments can connect together to generate a connected set of track-assigned sub-wires that can be used in place of the routing wire.


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