The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 01, 2021

Filed:

Dec. 30, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Neeraj S. Upasani, Portland, OR (US);

Jeanne Guillory, Hillsboro, OR (US);

Wojciech Powiertowski, Portland, OR (US);

Sergiu D Ghetie, Hillsboro, OR (US);

Mohan J. Kumar, Aloha, OR (US);

Murugasamy K. Nachimuthu, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/445 (2018.01); H04L 12/24 (2006.01); G06F 15/78 (2006.01); G06F 9/4401 (2018.01); H04L 12/933 (2013.01); G06F 8/654 (2018.01);
U.S. Cl.
CPC ...
G06F 9/44521 (2013.01); G06F 9/4401 (2013.01); G06F 15/7807 (2013.01); G06F 15/7867 (2013.01); H04L 41/0813 (2013.01); H04L 41/5054 (2013.01); G06F 8/654 (2018.02); H04L 41/5096 (2013.01); H04L 49/109 (2013.01);
Abstract

Dynamically configurable server platforms and associated apparatus and methods. A server platform including a plurality of CPUs installed in respective sockets may be dynamically configured as multiple single-socket servers and as a multi-socket server. The CPUs are connected to a platform manager component comprising an SoC including one or more processors and an embedded FPGA. Following a platform reset, an FPGA image is loaded, dynamically configuring functional blocks and interfaces on the platform manager. The platform manager also includes pre-defined functional blocks and interfaces. During platform initialization the dynamically-configured functional blocks and interfaces are used to initialize the server platform, while both the pre-defined and dynamically-configured functional blocks and interfaces are used to support run-time operations. The server platform may be used in conventional rack architectures or implemented in a disaggregated rack architecture under which the single-socket and/or multi-socket servers are dynamically composed to employ disaggregated resources, such as memory, storage, and accelerators.


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