The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 25, 2021

Filed:

Aug. 31, 2020
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventor:

Rainer Bonitz, Bruckmuehl, DE;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); G11C 16/34 (2006.01); G11C 16/08 (2006.01); G11C 16/30 (2006.01); G11C 16/10 (2006.01); G11C 16/22 (2006.01); G11C 16/26 (2006.01); G11C 16/04 (2006.01); G11C 14/00 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3418 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01); G11C 16/225 (2013.01); G11C 16/30 (2013.01); G11C 14/0063 (2013.01); G11C 16/04 (2013.01); G11C 16/0483 (2013.01); G11C 16/26 (2013.01);
Abstract

Methods of operating memory might include storing information indicative of a data value of a digit of data stored in a particular memory cell of the memory prior to programming a subsequent digit of data to the particular memory cell, programming the subsequent digit of data to the particular memory cell, monitoring a voltage level of a supply voltage to the memory while programming the subsequent digit of data, and, if the voltage level of the supply voltage falls below a threshold while programming the subsequent digit of data and the information indicative of the data value of the digit of data has a particular logic level, causing a change in threshold voltage of one memory cell of a pair of gate-connected non-volatile memory cells, and inhibiting the other memory cell of the pair of gate-connected non-volatile memory cells from a change in threshold voltage.


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