The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 25, 2021

Filed:

Oct. 07, 2019
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Chaitanya Ravindra Peddawad, Bangalore, IN;

Jeffrey Hemmett, St. George, VT (US);

Jason D. Morsey, Hopewell Junction, NY (US);

Steven E. Washburn, Poughquag, NY (US);

Peter Elmendorf, Poughkeepsie, NY (US);

Debjit Sinha, Wappingers Falls, NY (US);

Kerim Kalafala, Rhinebeck, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/33 (2020.01); G06F 30/327 (2020.01); G06F 30/392 (2020.01); G06F 119/12 (2020.01);
U.S. Cl.
CPC ...
G06F 30/327 (2020.01); G06F 30/392 (2020.01); G06F 2119/12 (2020.01);
Abstract

The efficiency of electronic design automation is increased by building, as an electronic data structure, a timing graph characterizing a putative integrated circuit design; identifying at least one of an edge and a node in the timing graph that requires canonical timing adjustment; and electronically calculating a deterministic timing adjustment for each of a plurality of corner cases. Based on the calculated deterministic timing adjustment for each of the plurality of corner cases, the canonical timing adjustment is determined for the at least one of an edge and a node; the canonical timing adjustment is applied to the timing graph; and the timing graph is updated based on the application of the canonical timing adjustment.


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