The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 18, 2021
Filed:
May. 30, 2019
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventor:
Han-Wen Liao, Taichung, TW;
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 21/268 (2006.01); H01L 21/66 (2006.01); H01L 27/088 (2006.01); H01L 21/311 (2006.01); H01L 21/67 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823431 (2013.01); H01L 21/0217 (2013.01); H01L 21/02057 (2013.01); H01L 21/268 (2013.01); H01L 21/823418 (2013.01); H01L 22/12 (2013.01); H01L 27/0886 (2013.01); H01L 29/66545 (2013.01); H01L 29/66636 (2013.01); H01L 29/66795 (2013.01); H01L 21/31116 (2013.01); H01L 21/67167 (2013.01);
Abstract
A method for manufacturing a semiconductor device includes forming a semiconductor fin over a substrate. A fin spacer is formed on a sidewall of the semiconductor fin. An e-beam treatment is performed on the fin spacer. An epitaxial structure is formed over the semiconductor fin. The epitaxial structure is in contact with the e-beam treated fin spacer.