The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 18, 2021

Filed:

Oct. 03, 2019
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Po-Kai Hsu, Tainan, TW;

Hung-Yueh Chen, Hsinchu, TW;

Kun-I Chou, Tainan, TW;

Jing-Yin Jhang, Tainan, TW;

Hui-Lin Wang, Taipei, TW;

Yu-Ping Wang, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 5/06 (2006.01); H01L 27/24 (2006.01); H01L 27/22 (2006.01);
U.S. Cl.
CPC ...
G11C 5/063 (2013.01); H01L 27/228 (2013.01); H01L 27/2463 (2013.01);
Abstract

A memory layout structure, which is provided with multiple source lines between active areas, each source line has multiple branches electrically connecting with the active areas at opposite sides in alternating arrangement. Multiple word lines traverse through the active areas to form transistors. Multiple storage units are disposed between the word lines on the active areas in staggered array arrangement, and multiple bit lines electrically connect with all storage units on a corresponding active area, wherein each storage cell includes one of the storage unit, two of the transistors respectively at both sides of the storage unit, and two branches of the source line.


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