The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 18, 2021
Filed:
Jan. 30, 2020
Intel Corporation, Santa Clara, CA (US);
David M. Durham, Beaverton, OR (US);
Siddhartha Chhabra, Hillsboro, OR (US);
Michael E. Kounavis, Portland, OR (US);
Sergej Deutsch, Hillsboro, OR (US);
Karanvir S. Grewal, Hillsboro, OR (US);
Joseph F. Cihula, Hillsboro, OR (US);
Saeedeh Komijani, Mountain View, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Apparatus, systems, computer readable storage mediums and/or methods may provide memory integrity by using unused physical address bits (or other metadata passed through cache) to manipulate cryptographic memory integrity values, allowing software memory allocation routines to control the assignment of pointers (e.g., implement one or more access control policies). Unused address bits (e.g., because of insufficient external memory) passed through cache, may encode key domain information in the address so that different key domain addresses alias to the same physical memory location. Accordingly, by mixing virtual memory mappings and cache line granularity aliasing, any page in memory may contain a different set of aliases at the cache line level and be non-deterministic to an adversary.