The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 18, 2021
Filed:
Jul. 06, 2020
Ranjan B. Lokappa, Winooski, VT (US);
Igor Arsovski, Williston, VT (US);
Ranjan B. Lokappa, Winooski, VT (US);
Igor Arsovski, Williston, VT (US);
MARVELL ASIA PTE, LTD., Singapore, SG;
Abstract
An adder includes a primary carry bit generation circuit and a summing circuit. The primary carry bit generation circuit is configured to generate first carry bits for a first number of pairs of bits from first and second operands, and to generate second carry bits for a second number of pairs of bits from the first and second operands. The second number of pairs being different than the first number of pairs. The summing circuit is configured to generate first sums by adding bits of pairs from the first and second number of pairs and the first and second carry bits. The summing circuit is configured to generate second sums by adding bits of other pairs of the bits from first and second operands than the pairs in the first and second number of pairs and additional carry bits generated when adding the bits of the other pairs.