The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 11, 2021

Filed:

Nov. 19, 2019
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Kambiz Samadi, San Diego, CA (US);

Shreepad Amar Panth, Atlanta, GA (US);

Yang Du, Carlsbad, CA (US);

Robert Philip Gilmore, Poway, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/768 (2006.01); G06F 30/39 (2020.01);
U.S. Cl.
CPC ...
H01L 23/49827 (2013.01); G06F 30/39 (2020.01); H01L 21/76802 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A hard macro includes a periphery defining a hard macro area and having a top and a bottom and a hard macro thickness from the top to the bottom, the hard macro including a plurality of vias extending through the hard macro thickness from the top to the bottom. Also an integrated circuit having a top layer, a bottom layer and at least one middle layer, the top layer including a top layer conductive trace, the middle layer including a hard macro and the bottom layer including a bottom layer conductive trace, wherein the top layer conductive trace is connected to the bottom layer conductive trace by a via extending through the hard macro.


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