The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 11, 2021
Filed:
Dec. 14, 2017
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Martin Langhammer, Alderbury, GB;
Gregg William Baeckler, San Francisco, CA (US);
Bogdan Pasca, Toulouse, FR;
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 5/01 (2006.01); G06F 7/499 (2006.01); G06F 7/509 (2006.01); G06F 7/485 (2006.01); G06F 9/30 (2018.01);
U.S. Cl.
CPC ...
G06F 9/3001 (2013.01); G06F 5/012 (2013.01); G06F 7/49915 (2013.01); G06F 7/509 (2013.01); G06F 7/485 (2013.01);
Abstract
Adder trees may be constructed for efficient packing of arithmetic operators into an integrated circuit. The operands of the trees may be truncated to pack an integer number of nodes per logic array block. As a result, arithmetic operations may pack more efficiently onto the integrated circuit while providing increased precision and performance.