Array substrate and manufacturing method thereof

Abstract

An array substrate and a manufacturing method thereof are provided. The array substrate includes a first thin-film transistor and a second thin-film transistor formed on a base and spaced from each other by a predetermined distance and set in parallel. The first thin-film transistor includes, sequentially stacked on the base, a first active layer, a first gate insulation layer, a first gate electrode, an interlayer insulation layer, and first source/drain electrodes. The first source/drain electrodes are electrically connected with the first active layer. The second thin-film transistors includes, sequentially stacked on the base, a second gate electrode, a second gate insulation layer, a second active layer, an etch stop layer, and second source/drain electrodes. The first active layer and the second gate electrode are both formed of a poly-silicon material. The first gate electrode and the second active layer are both formed of an oxide semiconductor material.