The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 04, 2021
Filed:
Dec. 12, 2018
Cadence Design Systems, Inc., San Jose, CA (US);
Quang Nguyen, San Jose, CA (US);
Duc Dang, San Jose, CA (US);
Raju Joshi, San Jose, CA (US);
David Abada, San Jose, CA (US);
Akash Sharma, San Jose, CA (US);
Zhanhe Shi, San Jose, CA (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
A method for providing, based on an emulation schedule, a reset message to multiple circuits is provided. The reset message associates a reset signal with a selected clock cycle for each circuit, in the emulation schedule. The method includes determining a mask for each of the circuits based on the emulation schedule, providing a clock signal to the circuits, the clock signal comprising the selected clock cycle for each circuit, and tuning the reset signal relative to the clock signal based on a center of the selected clock cycle for each circuit. The method also includes providing the reset signal to the circuits and asserting the reset signal in the circuits based on the mask. A system and a non-transitory, machine-readable medium storing instructions to perform the above method are also provided.