The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 04, 2021

Filed:

Jul. 19, 2019
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

John Heck, Berkeley, CA (US);

Harel Frish, Qiryat Gat, IL;

Reece DeFrees, Rio Rancho, NM (US);

George A. Ghiurcan, Corrales, NM (US);

Hari Mahalingam, San Jose, CA (US);

Pegah Seddighian, San Jose, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B 6/42 (2006.01); G02B 6/12 (2006.01); G02B 6/122 (2006.01);
U.S. Cl.
CPC ...
G02B 6/4206 (2013.01); G02B 6/4246 (2013.01);
Abstract

Embodiments of the present disclosure are directed toward techniques and configurations for an optical coupler including an optical waveguide to guide light to an optical fiber. In embodiments, the optical waveguide includes a tapered segment to propagate the received light to the optical fiber. In embodiments, the tapered segment is buried below a surface of a semiconductor substrate to transition the received light within the semiconductor substrate from a first optical mode to a second optical mode to reduce a loss of light during propagation of the received light from the optical waveguide to the optical fiber. In embodiments, the surface of the semiconductor substrate comprises a bottom planar surface of a silicon photonic chip that includes at least one or more of passive or active photonic components. Other embodiments may be described and/or claimed.


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