The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 27, 2021

Filed:

Jan. 20, 2020
Applicant:

Unimicron Technology Corp., Taoyuan, TW;

Inventors:

Kai-Ming Yang, Hsinchu County, TW;

Chen-Hao Lin, Keelung, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/40 (2006.01); H05K 3/46 (2006.01); H01L 21/768 (2006.01); H01L 23/00 (2006.01); H01L 23/522 (2006.01); H05K 3/32 (2006.01); H05K 3/40 (2006.01); H01L 23/488 (2006.01);
U.S. Cl.
CPC ...
H05K 3/4644 (2013.01); H01L 21/76832 (2013.01); H01L 23/488 (2013.01); H01L 23/522 (2013.01); H01L 24/02 (2013.01); H01L 24/13 (2013.01); H05K 3/32 (2013.01); H05K 3/40 (2013.01); H01L 2224/0361 (2013.01); H01L 2924/201 (2013.01); H05K 2203/0384 (2013.01);
Abstract

A circuit substrate includes a substrate, a wire build-up layer structure, and an insulating layer. The substrate has a first surface and a second surface opposites to the first surface. The substrate includes a plurality of patterned pads. The patterned pads are disposed on the first surface of the substrate, and having contact openings. The wire build-up layer structure is disposed on the first surface of the substrate. The wire build-up layer structure includes an interconnect build-up layer and a plurality of conductive pillars. The conductive pillars electrically connect to the interconnect build-up layer and the patterned pads. The insulating layer is disposed between the substrate and the wire build-up layer structure.


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