The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 27, 2021

Filed:

Dec. 13, 2019
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Wei-Yu Ma, Taitung, TW;

Hui-Mei Chou, Hsinchu County, TW;

Kuo-Ji Chen, New Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01); H01L 23/58 (2006.01); H01L 23/528 (2006.01); H01L 23/522 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 23/585 (2013.01); H01L 23/522 (2013.01); H01L 23/5286 (2013.01); H01L 27/0207 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A method is disclosed and includes forming a plurality of dummy conductive cells that provides different densities in empty areas in metal layers of a semiconductor device according to overlap conditions of the empty areas each arranged between a pair of neighboring metal layers of metal layers. Forming the plurality of dummy conductive cells includes operations of forming a group of dummy conductive cells in a single empty area of the empty areas when the single empty area in one pair of the neighboring metal layers is overlapped by a signal line in the same pair of the neighboring metal layers. When viewed in plan view, projection areas of the group of dummy conductive cells are vertically overlapped by a projection area of the signal line. A semiconductor device is also disclosed herein.


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