The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 27, 2021
Filed:
Jun. 11, 2019
Applicant:
Renesas Electronics Corporation, Tokyo, JP;
Inventors:
Shinichi Uchida, Tokyo, JP;
Yasutaka Nakashiba, Ibaraki, JP;
Assignee:
RENESAS ELECTRONICS CORPORATION, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/522 (2006.01); H01L 49/02 (2006.01); H01L 27/092 (2006.01); H01L 21/8238 (2006.01); H01L 29/78 (2006.01); H01L 23/528 (2006.01); H01L 21/84 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5225 (2013.01); H01L 21/823871 (2013.01); H01L 21/84 (2013.01); H01L 23/5286 (2013.01); H01L 27/092 (2013.01); H01L 27/1203 (2013.01); H01L 28/10 (2013.01); H01L 29/7838 (2013.01);
Abstract
In a semiconductor device, a semiconductor substrate includes a bulk layer, a buried oxide layer provided in at least a partial region on the bulk layer, and a surface single crystal layer on the buried oxide layer. An inductor is provided above a main surface side of the semiconductor substrate on which the surface single crystal layer is disposed. To increase a Q value of the inductor, a ground shield is an impurity region formed in the bulk layer below the inductor and below the buried oxide layer.