The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 27, 2021

Filed:

May. 25, 2020
Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Sauresh Bhowmick, Bangalore, IN;

Bhaskar Pal, Bangalore, IN;

Esha Dutta, Bangalore, IN;

Harsha Vardhan, Bangalore, IN;

Assignee:

SYNOPSYS, INC., Mountain View, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 30/333 (2020.01); G06F 11/34 (2006.01); G06F 3/0484 (2013.01); G06F 30/398 (2020.01); G06F 30/33 (2020.01);
U.S. Cl.
CPC ...
G06F 30/333 (2020.01); G06F 3/04847 (2013.01); G06F 11/3466 (2013.01); G06F 30/398 (2020.01); G06F 30/33 (2020.01);
Abstract

A system and method generates cluster-based power architecture interfaces for an integrated circuit (IC) design under test (DUT) debugging by receiving design data for an IC DUT, determining power characteristic data for the IC DUT, generating display components within a graphical user interface (GUI) corresponding to individual components encompassed within a power intent hierarchy corresponding with the IC DUT, generating graphical links between displayed components, overlaying interactive elements corresponding with generated violation clusters over graphical links, and providing root-cause interactive elements within the generated GUI having visual associations with the interactive components corresponding with particular violation clusters.


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