The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 20, 2021

Filed:

Oct. 29, 2019
Applicant:

Magnachip Semiconductor, Ltd., Cheongju-si, KR;

Inventors:

Bo Seok Oh, Cheongju-si, KR;

Hee Hwan Ji, Daejeon, KR;

Kwang Ho Park, Cheongju-si, KR;

Assignee:

KEY FOUNDRY., LTD., Cheongju-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H03K 19/0175 (2006.01); H01L 29/78 (2006.01); H01L 21/768 (2006.01); H01L 29/66 (2006.01); G11C 19/00 (2006.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 27/124 (2013.01); G11C 19/00 (2013.01); H01L 21/76897 (2013.01); H01L 29/6659 (2013.01); H01L 29/66507 (2013.01); H01L 29/7833 (2013.01); H01L 29/7834 (2013.01); H03K 19/017509 (2013.01); H01L 29/513 (2013.01); H01L 29/7836 (2013.01);
Abstract

A display driver semiconductor device includes a high voltage well region formed on a substrate, a first semiconductor device, a second semiconductor device, and a third semiconductor device. The first semiconductor device is formed on the high voltage well region and includes a first gate insulating layer formed using a deposition process. The second semiconductor device is formed adjacent to the first semiconductor device and includes a second gate insulating layer formed using a thermal process. The third semiconductor device is formed adjacent to the second semiconductor device and includes a third gate insulating layer.


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