The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 20, 2021
Filed:
Jul. 22, 2019
Jiangsu Advanced Memory Technology Co., Ltd., Jiangsu, CN;
Jiangsu Advanced Memory Semiconductor Co., Ltd., Jiangsu, CN;
Hsiung-Shih Chang, Hsinchu County, TW;
Yu-Cheng Liao, Hsinchu County, TW;
Meng-Hsueh Tsai, Hsinchu County, TW;
Jiangsu Advanced Memory Technology Co., Ltd., Jiangsu, CN;
Jiangsu Advanced Memory Semiconductor Co., Ltd., Jiangsu, CN;
Abstract
A memory test array and a test method thereof are provided. The memory test array includes a first memory array, a second memory array, and a plurality of first common conductive pads. The first memory array includes a plurality of first bit lines and a plurality of first word lines. The second memory array is adjacent to the first memory array and includes a plurality of second bit lines and a plurality of second word lines. Each of the first common conductive pads has a first end and a second end, and the first ends and the second ends are respectively coupled to the first bit lines and the second bit lines, or respectively coupled to the first word lines and the second word lines. The memory test array of the present disclosure can effectively save the area of the memory test chip and make the test process more efficient.