The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 20, 2021
Filed:
Oct. 23, 2019
Cadence Design Systems, Inc., San Jose, CA (US);
Ankur Chaplot, Noida, IN;
Yashu Gupta, Greater Noida, IN;
Nikhil Garg, Faridabad, IN;
Sachin Shrivastava, Noida, IN;
Michaela Guiney, San Jose, CA (US);
Sankalp Srivastava, Noida, IN;
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
An approach is described for a method, system, and product, the approaching includes identification of an integrated circuit design, identification of sync groups (nets having synchronous voltage levels), generation of a physical design having sync group constraints, and performance of design rule checking on a physical design based on at least transferred sync group information. This provides for performing design rule analysis at least using small minimum spacing requirements then would otherwise be required with prior techniques. In some embodiments, the approach includes a verification process that ensures that synchronous voltage behavior is appropriately associated with members of respective sync groups and cleans up old association data that is no longer relevant/correct.