The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 20, 2021

Filed:

Aug. 13, 2019
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventors:

Rajdeep Mukherjee, San Jose, CA (US);

Benjamin Meng-Ching Chen, Los Altos, CA (US);

Habeeb Farah, Nazareth, IL;

Ziyad Hanna, Haifa, IL;

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 8/20 (2018.01); G06F 8/10 (2018.01);
U.S. Cl.
CPC ...
G06F 8/20 (2013.01); G06F 8/10 (2013.01);
Abstract

The present disclosure relates to a method for use in a formal verification of an electronic design. Embodiments may include receiving, using a processor, a reference model including a software specification and an implementation model at a register transfer level. Embodiments may also include generating one or more invariants based upon, at least in part, the reference model, wherein generating one or more invariants includes applying a semantic analysis. Embodiments may further include automatically generating at least one case splitting candidate based upon, at least in part, the one or more generated invariants.


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