The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 13, 2021

Filed:

Nov. 13, 2019
Applicant:

Realtek Semiconductor Corporation, Hsinchu, TW;

Inventors:

Chun-Chi Yu, Hsinchu County, TW;

Fu-Chin Tsai, Taipei, TW;

Chih-Wei Chang, Hsinchu County, TW;

Gerchih Chou, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/22 (2006.01); G11C 11/4076 (2006.01); G11C 7/04 (2006.01); G11C 11/4093 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G11C 7/222 (2013.01); G06F 3/0644 (2013.01); G11C 7/04 (2013.01); G11C 11/4076 (2013.01); G11C 11/4093 (2013.01); G11C 2207/2254 (2013.01);
Abstract

Disclosed is a DDR SDRAM signal calibration device capable to adapting to the variation of voltage and/or temperature. The device includes: an enablement signal setting circuit configured to generate data strobe (DQS) enablement setting; a signal pad configured to output a DQS signal; a signal gating circuit configured to generate a DQS enablement setting signal and a DQS enablement signal according to the DQS enablement setting and then output a gated DQS signal according to the DQS enablement signal and the DQS signal; and a calibration circuit configured to output a calibration signal according to the DQS enablement setting signal and at least one of the DQS enablement signal and the DQS signal so that the enablement signal setting circuit can maintain or adjust the DQS enablement setting according to the calibration signal.


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