The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 13, 2021

Filed:

Mar. 26, 2019
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventor:

Kazuhiro Yoshida, Tokyo, JP;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 7/22 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1084 (2013.01); G11C 7/225 (2013.01); H01L 24/06 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 25/0657 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48106 (2013.01); H01L 2224/48225 (2013.01); H01L 2224/73215 (2013.01); H01L 2224/73265 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06562 (2013.01); H01L 2225/06586 (2013.01); H01L 2924/1434 (2013.01);
Abstract

Memory devices, memory systems, and systems, include memory devices with a bonding pad region for coupling command-and-address (CA) input signals and a memory cell region for storing information in memory cells. A centralized CA interface region includes input circuits coupled to the CA input signals. At least two of the input circuits are configured in pairs. Each pair includes a first input circuit coupled to a first input and configured to generate a first output and a second input circuit coupled to a second input and configured to generate a second output. Each pair also includes a swap circuit disposed between the first input circuit and the second input circuit. The swap circuit selects one of the first output or the second output for a first internal signal and selects the other of the first output and the second output for a second internal signal responsive to a control signal.


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